1. Field
This disclosure relates generally to caches, and more specifically, to pseudo least recently used cache replacement.
2. Related Art
Typically, cache structures may incorporate the ability to lock portions of the cache such that they become unavailable for replacement. In these cache structures, after generating the replacement pointer on a cache miss, the replacement pointer is compared with the lock information in order to generate a modified replacement pointer. However, the ability to generate the modified replacement pointer takes additional gate delays and typically appears in a speed path of the design, negatively impacting the design. Furthermore, the modified replacement pointer may reflect a replacement choice that is far less optimal, thus further reducing cache performance.